View SAA7207H_120108.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
DATA SHEET
SAA7207H Reed Solomon decoder IC
Product specification File under Integrated Circuits, IC02 1996 Jul 17
Philips Semiconductors
Product specification
Reed Solomon decoder IC
FEATURES * (204, 188 and 17) Digital Video Broadcasting (DVB) compliant Reed Solomon (RS) codes * Automatic synchronization of bytes, blocks and frame * Convolutional de-interleaving (I = 12) * Energy dispersal de-randomizing * Contained in a 44-pin quad flat package * I2C-bus interface * 6 quasi-bidirectional ports * Boundary scan facility. QUICK REFERENCE DATA SYMBOL VDD IDD(tot) TCLK total supply current input clock period PARAMETER operational supply voltage - - MIN. 4.75 TYP. 5.00 65 31.5 APPLICATIONS
SAA7207H
* Forward Error Correction (FEC) for digital TV distribution according to the DVB standard.
MAX. 5.25 - - V
UNIT mA ns
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME SAA7207H/C1 QFP44 DESCRIPTION plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm VERSION SOT307-2
1996 Jul 17
2
Philips Semiconductors
Product specification
Reed Solomon decoder IC
BLOCK DIAGRAM
SAA7207H
handbook, full pagewidth
CLK 38
DATA1 DATA0 VALI TRST TCK TMS TDI TDO TC0 TC1
35 36 34 3 4 5 6 7 41 42 RAM D INPUT INTERFACE
TEST CONTROL BLOCK FOR BOUNDARY SCAN TEST AND SCAN TEST
1/2CLK
VALI
DATA (0 : 3) 2
SYNCHRONIZATION
NOSYNC
1/4CLK
DATA (7 : 0)
DE-INTERLEAVING
1/4CLK SYNDROME CALCULATION
DATA (7 : 0) RAM B BUFFER
RAM M
syndrome coefficient ERROR CORRECTION 1/4CLK SDA SCL PORT5 to PORT0 44 1 I2C-BUS INTERFACE 1/4CLK 27 to 32 OUTPUT INTERFACE DESCRAMBLER DATA (7 : 0) 21
RESET
43
OE
DATA (7 : 0)
11, 12, 13, 15, 16,17,19, 20, 9
BYTEO0 to BYTEO7 BCLK BEGIN BERR
SAA7207H
10, 18, 25, 33, 39
24 23
VDD
8, 14, 22, 26, 37, 40 VSS
MBH315
Fig.1 Block diagram.
1996 Jul 17
3
Philips Semiconductors
Product specification
Reed Solomon decoder IC
PINNING SYMBOL SCL NOSYNC TRST TCK TMS TDI TDO VSS BCLK VDD BYTEO0 BYTEO1 BYTEO2 VSS BYTEO3 BYTEO4 BYTEO5 VDD BYTEO6 BYTEO7 OE VSS BERR BEGIN VDD VSS PORT5 PORT4 PORT3 PORT2 PORT1 PORT0 VDD VALI DATA1 DATA0 VSS CLK VDD VSS 1996 Jul 17 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 I/O I O I I I I O - O*(1) - O*(1) O*(1) O*(1) - O*(1) O*(1) O*(1) - O*(1) O*(1) I - O*(1) O*(1) - - I/O I/O I/O I/O I/O I/O - I I I - I - - serial clock input (I2C-bus) DESCRIPTION not synchronized output (1 = not synchronized) boundary scan test reset (0 = active) boundary scan test clock boundary scan test mode select (1 = BST select) boundary scan test data input boundary scan test data output ground byte clock output positive supply voltage output data byte 0 (LSB) output data byte 1 output data byte 2 ground output data byte 3 output data byte 4 output data byte 5 positive supply voltage output data byte 6 output data byte 7 (MSB)
SAA7207H
output enable not (active LOW; 1 = O*(1) high impedance) ground block error output (1 = uncorrectable block) begin of block output (1st byte of block is output) positive supply voltage ground quasi-bidirectional port 5 quasi-bidirectional port 4 quasi-bidirectional port 3 quasi-bidirectional port 2 quasi-bidirectional port 1 quasi-bidirectional port 0 positive supply voltage valid input (1 = data is valid) input data 1 (MSB) input data 0 (LSB) ground master clock input (also acting as input data clock) positive supply voltage ground 4
Philips Semiconductors
Product specification
Reed Solomon decoder IC
SAA7207H
SYMBOL TC0 TC1 RESET SDA Note
PIN 41 42 43 44
I/O I I I I/O
DESCRIPTION test mode control input 0 (0 = application mode) test mode control input 1 (0 = application mode) master reset input (1 = active) bidirectional serial data port (I2C-bus)
1. When OE is active (pin 21 = HIGH), all O* outputs become high impedance.
43 RESET
36 DATA0
35 DATA1
handbook, full pagewidth
34 VALI
39 VDD
44 SDA
40 VSS
37 VSS
38 CLK
42 TC1
41 TC0
SCL NOSYNC TRST TCK TMS TDI TDO VSS BCLK
1 2 3 4 5 6 7 8 9
33 VDD 32 PORT0 31 PORT1 30 PORT2 29 PORT3
SAA7207H
28 PORT4 27 PORT5 26 VSS 25 VDD 24 BEGIN 23 BERR
VDD 10 BYTEO0 11 BYTEO1 12 BYTEO2 13 VSS 14 BYTEO3 15 BYTEO4 16 BYTEO5 17 VDD 18 BYTEO6 19 BYTEO7 20 OE 21 VSS 22
MBH314
Fig.2 Pin configuration.
1996 Jul 17
5
1996 Jul 17 6
Philips Semiconductors
FUNCTIONAL DESCRIPTION
Reed Solomon decoder IC
Input interface (see Fig.3) The received input data stream is a sequence which is interpreted as a stream of bytes. The bits are assumed to be non-byte aligned and sent in MSB to LSB order. New data may be present at the input pins on each rising edge of the master clock input (CLK). Valid data is indicated by VALI = HIGH. When VALI = LOW the data is not valid and will be neglected. There are no limitations imposed on valid/non-valid sequences. The Quadrature Amplitude Modulation (QAM) of the input data is given in Table 1. Table 1 Quadrature amplitude modulation; note 1 QUADRATURE AMPLITUDE MODULATION(2) SLOT 256 QAM DATA1 DATA0 0 1 2 3 4 5 6 7 Notes 1. X = don't care. 2. The numbers given in parenthesis refer to the bit numbers. Sn-1 [7] Sn-1 [5] Sn-1 [3] Sn-1 [1] Sn [7] Sn [5] Sn [3] Sn [1] Sn-1 [6] Sn-1 [4] Sn-1 [2] Sn-1 [0] Sn [6] Sn [4] Sn [2] Sn [0] VALI 1 1 1 1 1 1 1 1 64 QAM DATA1 DATA0 Sn-1 [5] Sn-1 [3] Sn-1 [1] X Sn [5] Sn [3] Sn [1] X Sn-1 [4] Sn-1 [2] Sn-1 [0] X Sn [4] Sn [2] Sn [0] X VALI 1 1 1 0 1 1 1 0 32 QAM DATA1 DATA0 Sn-1 [4] Sn-1 [2] X X Sn-1 [0] Sn [3] Sn [1] X Sn-1 [3] Sn-1 [1] X X Sn [4] Sn [2] Sn [0] X VALI 1 1 0 0 1 1 1 0 16 QAM DATA1 DATA0 Sn-1 [3] Sn-1 [1] X X Sn [3] Sn [1] X X Sn-1 [2] Sn-1 [0] X X Sn [2] Sn [0] X X VALI 1 1 0 0 1 1 0 0 4 QAM DATA1 DATA0 Sn-1 [1] X X X Sn [1] X X X Sn-1 [0] X X X Sn [0] X X X VALI 1 0 0 0 1 0 0 0
Product specification
SAA7207H
Philips Semiconductors
Product specification
Reed Solomon decoder IC
Synchronization (see Fig.4) The input stream is interpreted as a stream of bytes consisting of blocks which; * Have a fixed 204 byte length * Start with 1 synchronization byte. Both de-interleaving and Reed Solomon decoding are based on this block structure. Energy dispersal descrambling is based on frames consisting of 8 blocks. The first block of a frame has a sync byte of B8H, and the remaining 7 blocks have a sync byte of 47H. Consequently, there are 2 synchronization processes: 1. Synchronization process 1: handles byte alignment and block synchronization. It is based on a state machine running from state 0 (out of sync) to state 6 (fully synchronized). 2. Synchronization process 2: handles frame synchronization for de-scrambling. It is based on the detection of a B8H sync byte (after Reed Solomon correction). Whenever such a sync byte is detected at the beginning of a correct/corrected block, a free running `block of frame counter' is synchronized/resynchronized. With reference to note 2 in Fig 4, BERR is asserted at the beginning of each new RS word (rising edge of BEGIN). NOSYNC = 0 when 6 consecutive sync bytes have been detected. BERR = 0 when the beginning of a frame has been detected (de-scrambler lock) and not more than 8 bytes were wrong. When more than 8 bytes are wrong, the BERR stays at logic 1 during the length of the word. De-interleaving (see Fig.5) Input data is interleaved, conforming a convolutional interleaving scheme. If we describe a Reed Solomon block as a 0 to 203 one dimensional byte array then; * Interleaving means that byte N of each block (N = 0 to 203) has been delayed by exactly D1 blocks (D1 = N mod 12) * So to de-interleave byte N of each block (N = 0 to 203) has to be delayed by D2 blocks [D2 = (203-N) mod 12]. Reed Solomon decoder The IC contains a high throughput Reed Solomon decoder consisting of three fully pipelined hardware units that execute finite field computations on de-interleaved input data blocks with lengths of 204 bytes. Field generator polynomial: p ( X ) = X8 + X4 + X3 + X2 + 1 Error correction
SAA7207H
Each of the units is dedicated to one of the following decoder algorithm stages; 1. Power sum polynomial (syndrome) calculation 2. Execution of the Euclidean algorithm to find the error locator polynomial and the error evaluator polynomial 3. Execution of a Chien search to find the roots of the error locator polynomial. For each root the error value is calculated (Forney algorithm) and stored in memory. Code generator polynomial: g (X) = (X + L0), (X + L1), (X + L2) to (X + L15) where L = 02H
The error correction unit corrects the errors as calculated by the Reed Solomon unit if, and only if, they are correctable. If not, the block is sent to the output unmodified (i.e. as received). If `Transport Error Indicator' (TEI = first bit after sync byte) modification is enabled the error flag is set in all uncorrectable blocks. In all cases the 16 parity bytes are stripped (the output is set to zero; BCLK is stopped) from the block reducing it to 188 bytes length. De-randomizing The energy dispersal descrambling algorithm is based on a 15 bit shift register which is initialised upon the arrival of the Least Significant Bit (LSB) of the first byte of each frame. De-scrambling is disabled for all sync bytes. Output interface (see Fig.6) The output data stream consists of a sequence of bytes (BYTEO 7 is the MSB). A new byte is present at the output pins at each rising edge of the byte clock. The BEGIN output is asserted for the first byte of a block and negated elsewhere. The BERR output is asserted during uncorrectable and/or unsynchronized blocks and negated during correct/corrected blocks.
1996 Jul 17
7
Philips Semiconductors
Product specification
Reed Solomon decoder IC
Mode of operation Table 2 PIN TC0 TC1 TRST TMS TCK TDI Note 1. The safest way to deactivate the Boundary Scan Test (BST) circuitry is to set TRST to logic 0. Control, monitoring and extension port interface Mode of operation for boundary scan test INTERNAL CONNECTION pull-down pull-down pull-up pull-up none pull-up APPLICATION MODE (REED SOLOMON) logic 0 or open-circuit logic 0 or open-circuit logic 0(1) open-circuit open-circuit open-circuit
SAA7207H
BOUNDARY SCAN TEST logic 0 or open-circuit logic 0 or open-circuit logic 1 or open-circuit input input input
An I2C-bus slave transmitter interface is included to provide the possibilities for a host to send control data and/or read monitoring information. For details of the interface protocol and timing on the I2C-bus see "The I2C-bus and how to use it"; 12NC number 9398 393 40011. Table 3 A6 1 Note 1. When X = 1 = read; when X = 0 = write. Table 4 Write (R/W = 0) LOGIC LEVEL 0 ERF(3) 0 0 DESCRIPTION(1) output data Port 5 to Port 0 mode control Port 5 to Port 0 Slave address A5 1 A4 0 A3 1 A2 0 A1 0 A0 1 R/W X(1)
BYTE 1st byte 2nd Notes byte(2)
1. Output data bits for port 5 to port 0; mode control bits for Port 5 to Port 0 (1 = input, 0 = output). 2. Sending the 2nd byte will force the IC to reset. 3. When ERF = 1 the error flag is set for uncorrectable blocks; when ERF = 0 the error flag is always left unmodified; default: ERF = 1, mode control = 111111 (default = default value after a hardware reset).
1996 Jul 17
8
Philips Semiconductors
Product specification
Reed Solomon decoder IC
Table 5 Read (R/W = 1) LOGIC LEVEL 0 S(2) - - 0 - - -
SAA7207H
BYTE 1st byte 2nd byte 3rd byte 4th byte Notes
DESCRIPTION input data Port 5 to Port 0(1) bits 22 to 16 of CorrCount bits 15 to 8 of CorrCount bits 7 to 0 of CorrCount
1. Input data bits for Port 5 to Port 0. 2. When S = 0 it is in sync status; when S = 1 it is in no sync status. The CorrCount is an estimation for the Byte Error Rate (BER) of the channel. This estimation is good for a high signal-to-noise ratio (SNR); then all uncorrected blocks will not have more than 9 errors. The CorrCount is incremented by 1 for each corrected byte. Each uncorrectable or unsychronized block will increment the CorrCount by 9. The CorrCount will saturate at `7FFFFFH' so that value actually means `counter overflow'. A CorrCount reset is caused by the following: * A hardware or software reset * Reading the 4th byte.
book, full pagewidth
Tsymbol
CLK
DATA1 DATA0
SLOT 0
SLOT 1
SLOT 2
SLOT 3
SLOT 4
VALI
MBH318
Fig.3 Input Interface.
1996 Jul 17
9
Philips Semiconductors
Product specification
Reed Solomon decoder IC
SAA7207H
handbook, full pagewidth
BEGIN (= sync)
NOSYNC (1)
BERR (2)
MBH316
(1) De-interleaver lock (sync process 1). (2) Descrambling lock (sync process 2) and the condition that not more than 8 byte errors have occurred.
Fig.4 Synchronization timing.
handbook, full pagewidth
0
17 x 11 1 1
0
single byte route
17 x 10
9
17 x 2
9
10
17 = M
10
11
11 = I - 1
MBH317
Fig.5 De-interleaver (I = 12).
1996 Jul 17
10
Philips Semiconductors
Product specification
Reed Solomon decoder IC
SAA7207H
handbook, full pagewidth
1 RS word (204 bytes) 1 transport packet (188 bytes) RS (204, 188, 17)
BYTEO (7 to 0)
sync
byte 1
byte 2
byte 187
sync
BEGIN
BCLK
BERR
MBH326
Fig.6 Output Interface timing.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD Vi Ii Io Tstg Tamb HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. Every pin withstands the ESD test in accordance with MIL-STD-883C category B (2000 V). Every pin withstands the ESD test in accordance with Philips Semiconductors Machine Model; 0 , 200 pF (200 V) THERMAL CHARACTERISTICS SYMBOL Rthj-a PARAMETER thermal resistance from junction to ambient in free air VALUE 61 UNIT K/W supply voltage input voltage input current output current storage temperature operating ambient temperature PARAMETER -0.3 0 -10 -20 -55 0 MIN. +6.0 VDD +10 +20 +150 70 MAX. V V mA mA C C UNIT
1996 Jul 17
11
Philips Semiconductors
Product specification
Reed Solomon decoder IC
CHARACTERISTICS VDD = 5 V; Tamb = 25 C; see notes 1 and 2; unless otherwise specified. SYMBOL PARAMETER CONDITIONS - 2.0 - - 7 5 - MIN. - - - - - - 5 - - TYP.
SAA7207H
MAX.
UNIT
Digital inputs: pins 35, 36 and 34 (DATA1, DATA0 and VALI); see Fig.7 VIL VIH tr tf tSU;DAT tHD;DAT CIi VOL VOH td tHD;DAT CL tCLK tw tr tf tBCLK tow(BCLK) Notes 1. Detailed timing of the RESET, NOSYNC, Port 0 to Port 5 and test pins is assumed not to be relevant for the application. 2. For a proper RESET procedure the RESET pin should be HIGH during at least 5 rising edges of the CLK pin. LOW level input voltage HIGH level input voltage rise time fall time set-up time hold time input capacitance 0.8 - 5 5 - - - V V ns ns ns ns pF
Digital outputs: pins 11 to 13, 15 to 17, 19, 20, 24 and 23 (BYTEO0 to BYTEO7, BEGIN and BERR); see Fig.8 LOW level output voltage HIGH level output voltage delay time hold time load capacitance CL = 30 pF CL = 30 pF 0 0.9VDD 0.1VDD VDD - - 30 - 19 5 5 - 2TCLK + 15 V V ns ns pF
2TCLK - 30 - 2TCLK - 30 - - - -
Clock input: pin 38 (CLK) cycle time pulse width rise time fall time 40 : 60 duty 31.5 - - - - ns ns ns ns 12 - -
Clock output: pin 9 (BCLK) BCLK cycle time BCLK pulse width 4TCLK ns ns 2TCLK - 15 -
1996 Jul 17
12
Philips Semiconductors
Product specification
Reed Solomon decoder IC
SAA7207H
handbook, full pagewidth
tr
tf tW 90%
CLK 10%
DATA0 DATA1 VALI
,,, ,,,
tr
tSU;DAT
tHD;DAT
tf
,,,, ,,,,
TCLK
MBH319
Fig.7 Input data timing waveforms.
handbook, full pagewidth
tr toW
tf 90%
BCLK 10%
BYTEO (7 to 0) BEGIN BERR
,,, ,,,
tHD;DAT
td
,,,, ,,,,
13
TBCLK
MBH320
Fig.8 Output data timing waveforms.
1996 Jul 17
Philips Semiconductors
Product specification
Reed Solomon decoder IC
SAA7207H
handbook, full pagewidth
TDA8046
d (1..0) dout (1..0) valid CSDV VALI
SAA7207H
DATA1 DATA0 BYTEO (7 to 0) BERR pkt_sync BEGIN clk clk CLK BCLK d (7..0)
SAA7205/06
M_in (7..0) pkt_bad M_bad
M_sync
CLKOUT
M_byte_clk
SDA SCL
MBH321
Fig.9 Application diagram.
1996 Jul 17
14
Philips Semiconductors
Product specification
Reed Solomon decoder IC
PACKAGE OUTLINE QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
SAA7207H
SOT307-2
c
y X
A 33 34 23 22 ZE
e E HE wM bp pin 1 index 44 1 bp D HD wM 11 ZD B vM B vMA 12 detail X A A2 (A 3) Lp L
A1
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.10 A1 0.25 0.05 A2 1.85 1.65 A3 0.25 bp 0.40 0.20 c 0.25 0.14 D (1) 10.1 9.9 E (1) 10.1 9.9 e 0.8 HD 12.9 12.3 HE 12.9 12.3 L 1.3 Lp 0.95 0.55 v 0.15 w 0.15 y 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 10 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT307-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-08-01
1996 Jul 17
15
Philips Semiconductors
Product specification
Reed Solomon decoder IC
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all QFP packages. The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our "Quality Reference Handbook" (order code 9398 510 63011). Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering
SAA7207H
Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. Even with these conditions, do not consider wave soldering the following packages: QFP52 (SOT379-1), QFP100 (SOT317-1), QFP100 (SOT317-2), QFP100 (SOT382-1) or QFP160 (SOT322-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1996 Jul 17
16
Philips Semiconductors
Product specification
Reed Solomon decoder IC
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA7207H
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1996 Jul 17
17
Philips Semiconductors
Product specification
Reed Solomon decoder IC
NOTES
SAA7207H
1996 Jul 17
18
Philips Semiconductors
Product specification
Reed Solomon decoder IC
NOTES
SAA7207H
1996 Jul 17
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 708 296 8556 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 615 800, Fax. +358 615 80920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 52 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. +30 1 4894 339/911, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 648 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +1 800 234 7381, Fax. +1 708 296 8556 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 83749, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 926 5361, Fax. +7 095 564 8323 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1, P.O. Box 22978, TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 2A Akademika Koroleva str., Office 165, 252148 KIEV, Tel. +380 44 476 0297/1642, Fax. +380 44 476 6991 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 708 296 8556 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 825 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1996
Internet: http://www.semiconductors.philips.com/ps/ (1) SAA7207H_1.copy June 26, 1996 11:51 am SCA50
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands
537021/1200/01/pp20 Date of release: 1996 Jul 17 Document order number: 9397 750 00964

▲Up To Search▲

Price & Availability of SAA7207H

	To Download SAA7207H Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .